1. Field of the Invention
The present invention relates to a method of fabricating an integrated circuit. More particularly, the present invention relates to a semiconductor device and a fabricating method thereof.
2. Description of the Related Art
Because of the special circuit design, non-volatile memory allows multiple data writing, reading and erasing operations and the stored data will be retained even after power to the device is removed. Furthermore, with the advantages of occupying a small volume, having a high access speed and consuming very little power, non-volatile memories have great demands in the market. The single-layered polysilicon one-time programmable device is presently the only conventional non-volatile memory that can integrate with high voltage devices in the same process. Because the single-layered polysilicon one-time programmable device has a structural design similar to a high-voltage device, processing integration is easier and mostly adopted by manufacturers. Yet, the single-layered polysilicon one-time programmable device has a low tolerance and the number of reuses of the device is not to exceed several tens. Obviously, this is a severe restriction on its widespread adoption.
Although most conventional electrically erasable programmable read-only-memory (EEPROM) can be accessed a large number of times, the memory cell needs to have at least two polysilicon layers, one serving as a floating gate layer while the other serving as a control gate. Since two polysilicon layers are required to form the memory cell in the EEPROM, the difference in height between the memory cell and the high-voltage devices in other circuit region is normally big. Hence, integrating the process of fabricating memory devices and high-voltage devices is difficult. Even when it is necessary to fabricate memories and high-voltage devices within the same chip, extra photomasks are often required resulting in more complicated steps, longer fabricating cycles and higher production cost.